Implementing electric circuits involves connecting isolated circuit components, alternately termed devices, through specific electrical paths. When fabricating integrated circuits into a semiconductor substrate, it must be possible to electrically isolate devices within the substrate from other devices within the substrate. The devices are subsequently interconnected to create specific desired circuit configurations.
One common technique for isolating devices is referred to as LOCOS Isolation (for LOCal Oxidation of Silicon), which involves the formation of a semi-recessed oxide in the non-active (or field) areas of the bulk substrate. Such oxide is typically thermally grown by means of wet oxidation of the bulk silicon substrate at temperatures of around 1000.degree. C. for two to four hours. The oxide grows where there is no masking material over other silicon areas on the substrate. A typical masking material used to cover areas where field oxide is not desired is nitride, such as Si.sub.3 N.sub.4.
However, at the edges of a nitride mask, some of the oxidant also diffuses laterally immediately therebeneath. This causes oxide to grow under and lift the nitride edges. The shape of the oxide at the nitride edges is that of a slowly tapering oxide wedge that merges into a previously formed thin layer of pad oxide, and has been termed as a "bird's beak". The bird's beak is essentially a lateral extension of the field oxide into the active areas of devices.
Conventional LOCOS for submicron technologies has numerous limitations. First, the bird's beak structure causes an unacceptably large encroachment of the field oxide into the device active regions. Second, boron from the typical channel-stop implant of n-channel MOSFETs is excessively redistributed during the field-oxide growth and other high-temperature steps, leading to unacceptable narrow-width effects. Third, the planarity of the resultant surface topology with LOCOS is inadequate for submicron lithography needs.
Oxide trench and refill techniques have been utilized to overcome drawbacks of conventional LOCOS. Such typically provides trenches into the substrate which are then filled with chemical vapor deposited (CVD) SiO.sub.2. The CVD SiO.sub.2 layer is then etched back to yield a planar surface.
It would be desirable to improve upon existing isolation technique.